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 NBSG111BAEVB Evaluation Board Manual for NBSG111
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EVALUATION BOARD MANUAL
DESCRIPTION This document describes the NBSG111 evaluation board and the appropriate lab test setups. It should be used in conjunction with the NBSG111 data sheet which contains full technical details on the device specifications and operation. The evaluation board is designed to facilitate a quick evaluation of the NBSG111 GigaCommTM 1:10 clock data driver. The NBSG111 allows selection between two inputs and fan out 10 identical differential outputs. The Reduced Swing ECL (RSECL) output ensures minimal noise and fast switching edges. The evaluation board is implemented in two layers for higher performance. For standard lab setup and test, a split (dual) power supply is required enabling the 50 W impedance from the scope to be used as termination of the ECL signals (VTT = VCC - 2.0 V, in split power supply setup, VTT is the system ground).
What measurements can you expect to make? With this evaluation board, the following measurements could be performed in single-ended(1) or differential modes of operation: * Jitter * Output Skew * Gain/Return Loss * Eye Pattern Generation * Frequency Performance * Output Rise and Fall Time * VIHCMR (Input High Common Mode Range)
1. Single-ended measurements can only be made at VCC - VEE = 3.3 V using this board setup.
Figure 1. NBSG111 Evaluation Board
(c) Semiconductor Components Industries, LLC, 2003
1
October, 2003 - Rev. 0
Publication Order Number: NBSG111BAEVB/D
NBSG111BAEVB
Setup for Time Domain Measurements
Table 1. Basic Equipment
Description Power Supply with 2 outputs Oscilloscope Differential Signal Generator Matched high speed cables with SMA connectors Power Supply cables with clips 1. Equipment used to generate example measurements within this document. 2. 50 GHz sample module used (for effective rise, fall and jitter performance measurement) HP6624A TDS8000 with 80E01 Sampling Head (Note 2) HP 8133A, Advantest D3186 Storm, Semflex Example Equipment (Note 1) Qty. 1 1 1 10 3
Setup
Connect Power Step 1:
1a: Three power levels must be provided to the board for VCC, VEE, and GND via the surface mount clips. Using the split power supply mode, GND = VTT = VCC - 2.0 V.
Power Supply Connections 3.3 V Setup VCC = 2.0 V VTT = GND VEE = -1.3 V 2.5 V Setup VCC = 2.0 V VTT = GND VEE = -0.5 V
Connect Inputs Step 2:
For Differential Mode (3.3 V and 2.5 V operation) 2a: Connect the differential output of the generator to the differential input of the device (CLK0 and CLK0). For Single-Ended Mode (3.3 V operation only) 2a: Connect the AC coupled single-ended output generator to input.
NOTE: For best results, unconnected input should be terminated to VTT through 50 W resistor VCC VCC = 2.0 V Channel 1 Channel 2
Float VTT = 0 V
Signal Generator VCC CLK0 OUT Q0 OUT Amplitude = 500 mV Offset = 660 mV Q9 CLK0 VEE EN EN GND Q9 VTT = 0 V VCC Float SEL SEL GND Q0
Channel 3 Channel 4 Digital Oscilloscope
Channel 5 Channel 6 Channel 7 Channel 8 TRIGGER * Q0 - Q9 Ouputs
TRIGGER VEE = -1.3 V (3.3 V op) -or- VEE = -0.5 V (2.5 V op) NOTE:
All differential cable pairs must be matched. Due to simplifcation of the block diagram CLK1/CLK1 and Q1 - Q8 connections are not shown.
Figure 2. NBSG111 Board Setup - Time Domain (Differential Mode) http://onsemi.com
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Setup (continued) Setup Input Signals Step 3:
3a: Set the signal generator amplitude to 500 mV.
NOTE: The signal generator amplitude can vary from 75 mV to 900 mV to produce a 400 mV DUT output.
3b: Set the signal generator offset to 660 mV (the center of a nominal RSECL PECL output).
NOTE: The VIHCMR (Input High Voltage Common Mode Range) allows the signal generator offset to vary as long as VIH is within the VIHCMR range. Refer to the device data sheet for further information.
3c: Set the generator output for a PRBS data signal, or for a square wave clock signal with a 50% duty cycle.
Connect Output Signals Step 4:
4a: Connect the outputs of the device (Q0, Q1, ...) to the Oscilloscope. The oscilloscope sampling head must have internal 50 W termination to ground.
NOTE: Where a single output is being used, the unconnected output for the pair must be terminated to VTT through a 50 W resistor for best operation. Unused pairs may be left unconnected. Since VTT = 0 V, a standard 50 W SMA termination is recommended.
VCC Float VCC = 2.0 V Signal Generator VCC AC_Coupling OUT Q0 OUT Amplitude = 500 mV Offset = 660 mV Q9 50 W CLK0 VEE EN EN GND Q9 VTT = 0 V VCC Float CLK0 SEL SEL GND Q0 VTT = 0 V
Channel 1 Channel 2
Channel 3 Channel 4 Digital Oscilloscope
Channel 5 Channel 6 Channel 7 Channel 8
TRIGGER VEE = -1.3 V (3.3 V op)
NOTE:
TRIGGER All differential cable pairs must be matched. Due to simplifcation of the block diagram CLK1/CLK1 and Q1 - Q8 connections are not shown. * Q0 - Q9 Outputs
Figure 3. NBSG111 Board Setup - Time Domain (Single-Ended Mode)
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NBSG111BAEVB
Setup for Frequency Domain Measurements
Table 2. Basic Equipment
Description Power Supply with 2 outputs Vector Network Analyzer (VNA) 180 Hybrid Coupler Bias Tee with 50 W Resistor Termination Matched high speed cables with SMA connectors Power Supply cables with clips 3. Equipment used to generate example measurements. Example Equipment (Note 3) HP 6624A R&S ZVK (10 MHz to 40 GHz) Krytar Model #4010180 Picosecond Model #5542-219 Storm, Semflex Qty. 1 1 1 1 3 3
Setup
Connect Power Step 1:
1a: Three power levels must be provided to the board for VCC, VEE, and GND via the surface mount clips. Using the split power supply mode, GND = VTT = VCC - 2.0 V.
Power Supply Connections 3.3 V Setup VCC = 2.0 V VTT = GND VEE = -1.3 V 2.5 V Setup VCC = 2.0 V VTT = GND VEE = -0.5 V
NOTE:
For frequency domain measurements, 2.5 V power supply is not recommended because additional equipment (bias tee, etc.) is needed for proper operation. The input signal has to be properly offset to meet VIHCMR range of the device.
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NBSG111BAEVB
Setup Test Configurations For Differential Operation
Small Signal Setup
Input Setup Step 2:
2a: Calibrate VNA from 1 0 GHz to 12 GHz 1.0 GHz. 2b: Set input level to -35 dBm at the output of the 180 Hybrid coupler (input of the DUT).
Output Setup
St 3 Step 3:
3a: Set display to measure S21 and record data.
Large Signal Setup
Input Setup Step 2: Step 3:
2a: Calibrate VNA from 1 0 GHz to 12 GHz 1.0 GHz. 2b: Set input levels to -2.0 dBm (500 mV) at the input of DUT.
Output Setup
3a: Set display to measure S21 and record data.
Vector Network Analyzer PORT 1 PORT 2
VCC GND 50 W VCC CLK0 1805 Hybrid Coupler SEL VCC = 2.0 V
Float VTT = 0 V
GND 50 W Bias T Q0
SEL
GND
Q0
50 W GND 50 W GND 50 W GND * Q0 - Q9 Outputs
Q9 CLK0 VEE EN EN GND Q9 VTT = 0 V VCC NOTE: Float
VEE = -1.3 V (3.3 V op)
All differential cable pairs must be matched. Due to simplifcation of the block diagram CLK1/CLK1 and Q1 - Q8 connections are not shown.
Figure 4. NBSG111 Board Setup - Frequency Domain (Differential Mode)
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Setup Test Configurations For Single-Ended Operation
Single-Ended Mode - Small Signal
Input Setup Step 2:
2a: Calibrate VNA from 1.0 GHz to 12 GHz. 2b: Set input level to -35 dBm at the input of DUT.
Output Setup
Step 3:
3a: Set display to measure S21 and record data.
Single-Ended Mode - Large Signal
Input Setup Step 2:
2a: Calibrate VNA from 1.0 GHz to 12 GHz. 2b: Set input levels to +2 dBm (500 mV) at the input of DUT.
Output Setup
Step 3:
3a: Set display to measure S21 and record data.
Vector Network Analyzer PORT 1 VCC Float GND VCC = 2.0 V VTT = 0 V 50 W Bias T Q0 PORT 2
VCC CLK0
SEL
SEL
GND
Q0
50 W GND 50 W GND 50 W GND
50 W GND
Q9 CLK0 VEE EN EN GND Q9 VTT = 0 V
* Q0 - Q9 Outputs
VEE = -1.3 V (3.3 V op)
NOTE:
VCC Float All differential cable pairs must be matched. Due to simplifcation of the block diagram CLK1/CLK1 and Q1 - Q8 connections are not shown.
Figure 5. NBSG111 Board Setup - Frequency Domain (Single-Ended Mode)
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NBSG111BAEVB
More Information About Evaluation Board Design Considerations for >10 GHz operation While the NBSG111 is specified to operate at 12 GHz, this evaluation board is designed to support operating frequencies up to 20 GHz. The following considerations played a key role to ensure this evaluation board achieves high-end microwave performance: * Optimal SMA connector launch * Minimal insertion loss and signal dispersion * Accurate Transmission line matching (50 ohms) * Distributed effects while bypassing and noise filtering
Surface Mount Clip VCC T2 VTEN 0 1 Surface Mount Clip Surface Mount Clip 1 EN EN T7 VTEN 0 C2 0 T4 T3 Open Circuit Stub T2 T2 T2 T2 T2 T2 T2 T2 1 T2 1 T2 1 T2 VTCLK 0 VTSEL Surface Mount Clip Surface Mount Clip 1 1 0 SEL T8 T8 SEL T5 0 VTSEL T3 Open Circuit Stub T4 C1 0 T2 1 T2 1 T2 T2 1 1 ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA T2 1 T2 1 ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA 1 ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA 1 1 1 1 1 1 1 1 ROSENBERGER SMA NBSG111 VTCLK1 0 1 ROSENBERGER SMA ROSENBERGER SMA 1 T1 T1 CLK1 CLK1 ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA ROSENBERGER SMA T6 T2 1 1 ROSENBERGER SMA ROSENBERGER SMA
T7
VTCLK0 0 ROSENBERGER SMA ROSENBERGER SMA 1 1 T1 0 T1 CLK0 CLK0 VTCLK0
NOTE:
C1, C2 = Decoupling Cap Tx = 50 W Transmision Line
VEE Surface Mount Clip
T2
Q0 - Q9 Outputs
Figure 6. Evaluation Board Schematic
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NBSG111BAEVB
Table 3. Parts List
Part No NBSG111BA 32K243-40ME3 CO6BLBB2X5UX Description 2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL Outputs Gold plated connector 2 MHz - 30 GHz capacitor Manufacturer ON Semiconductor Rosenberger Dielectric Laboratories WEB address http://www.onsemi.com/NBSG111 http://www.rosenberger.de http://www.dilabs.com
Table 4. Board Material
Material Rogers 6002 Copper Plating 12.5 mil Thickness 5.0 mil 32 mil
1.37 mil Dielectric (5.0 mil) Thick Copper Base
Figure 7. Board Stack-up
PIN 1
Figure 8. Layout Mask for NBSG111
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NBSG111BAEVB
EXAMPLE MEASUREMENTS IN TIME DOMAIN
550 OUTPUT VOLTAGE AMPLITUDE (mV)
10.0 9.0
450
Q AMP (mV)
7.0 3.3 V 350 2.5 V 250 RMS JITTER (ps) 150 1 2 3 4 5 6 INPUT FREQUENCY (GHz) 3.0 2.0 1.0 0.0 6.0 5.0 4.0
Figure 9. Output Voltage Amplitude (VOUTPP) / RMS Jitter vs. Input Frequency (fin) at Ambient Temperature (Typical)
Figure 10. NBSG111: Eye Diagram at 6 Gbps with PRBS 2^31-1 (Total Pk-Pk system jitter including signal generator is 28 ps. Device Pk-Pk jitter is typically 14 ps.)
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RMS JITTER (ps)
8.0
NBSG111BAEVB
ADDITIONAL EVALUATION BOARD INFORMATION
www.onsemi.com References
In all cases, the most up-to-date information can be found on our website. * Sample orders for devices and boards * New Product updates * Literature download/order * IBIS and Spice models
NBSG111/D, Data Sheet, NBSG111, 2.5V/3.3V SiGe 1:10 Differential Clock / Data Driver with RSECL Outputs AND8077/D, Application Note, GigaCommE (SiGe) SPICE Modeling Kit. AND8075/D, Application Note, Board Mounting Considerations for the FCBGA Packages.
ORDERING INFORMATION
Orderable Part No NBSG111BA NBSG111BA NBSG111BAEVB Description 2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL Outputs 2.5V/3.3V SiGe Differential 1:10 Clock/Data Driver with RSECL Outputs NBSG111 Evaluation Board Package 4X4 mm FCBGA-49 4X4 mm FCBGA-49 Shipping 100 Units/Tray 500 Units/Reel
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NBSG111BAEVB
PACKAGE DIMENSIONS
FCBGA-49 BA SUFFIX PLASTIC 8x8 mm (1.0 mm pitch) BGA FLIP CHIP PACKAGE CASE 489A-02 ISSUE A
A B D
TERMINAL A1 CORNER
A A2 Z
E
NOTES: 1. CONTROLLING DIMENSION: MILLIMETER. 2. DIMENSIONS AND TOLERANCES PER ASME Y14.5M-1994. 3. DIMENSION b IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER, PARALLEL TO DATUM PLANE C. 4. DATUM C (SEATING PLANE) IS DEFINED BY THE SPHERICAL CROWNS OF THE SOLDER BALLS. 5. PARALLELISM MEASUREMENT SHALL EXCLUDE ANY EFFECT OF MARK ON TOP SURFACE OF PACKAGE. 6. 489A-01 OBSOLETE, NEW STANDARD 489A-02. DIM A A1 A2 b D D1 E E1 e MILLIMETERS MIN MAX --- 1.40 0.3 0.5 0.91 REF 0.40 0.60 8.00 BSC 6.00 BSC 8.00 BSC 6.00 BSC 1.00 BSC
4X
0.15 C D1 e
A FEDUCIAL FOR PIN A1 IDENTIFICATION IN THIS AREA
e E1
EE EE
DETAIL A
B C D E F G 7 6 5 4 3 2 1 49 X
Z
NOTE 5
b NOTE 3 0.15 0.08
M M
0.20 C CA B C
NOTE 4
C
SEATING PLANE
0.12 C
49 X
A1
VIEW Z-Z
DETAIL A (ROTATED 90 _ C.W.)
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NBSG111BAEVB
GigaComm is a trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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NBSG111BAEVB/D


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